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1 www.semtech.com sc4810b/e high performance current mode pwm controller with complementary output, programmable delay power management revision: july 27, 2006 description features applications typical application circuit ? operation to 1mhz ? accurate programmable maximum duty cycle ? line voltage monitoring ? external frequency synchronization ? bi-phase mode of operation for low ripple ? independent programmable delays ? hiccup mode current limit ? under 250a start-up current ? programmable maximum volt-second clamp ? accessible reference voltage ? vdd undervoltage lockout ? -40c to 105c operating temperature ? 16 lead tssop or mlpq lead free packages. both fully weee and rohs compliant the sc4810b/e is a 16 pin bicmos primary side pwm controller for use in isolated dc-dc and off-line switching power supplies. it is a highly integrated solution, requiring few external components. it features a high frequency of operation, accurately programmable maximum duty cycle, current mode control, line voltage monitoring, supply uvlo, low start-up current, and programmable soft start with user accessible reference. it operates in a fixed frequency, highly desirable for telecom applications. the output for switch is complementary to each other with programmable delay between each transition. the active technique allows single ended converters beyond 50% duty cycle and greater flux swing for the power transformer while reducing voltage stresses on the switches. the separate sync pin simplifies synchronization to an external clock. feeding the oscillator of one device to the sync of another forces biphase operation which reduces input ripple and filter size. the sc4810b/e has a turn-on voltage threshold of 7v. in the sc4810b, out2 is inverted to drive the n-mosfet. in the sc4810e, out2 is non-inverted to drive the p-mosfet. these devices are available in a tssop-16 or mlpq-16 lead package. ? telecom equipment and power supplies ? networking power supplies ? power over lan applications ? industrial power supplies ? isolated power supplies ? voip phones vout r19 c3 c4 c5 +48v r5 r2 u3 1 7 2 6 5 u4 sc431l c10 d3 r17 l1 c13 d2 c16 r1 u1 sc1302a 2 7 6 3 1 8 4 5 c15 r10 r21 r18 r3 u2 sc4810 luvlo 2 rct 4 fb 11 sy nc 3 cs 10 pgnd 14 out1 15 vdd 1 dmax 5 ss 9 delay1 7 ramp 6 vref 16 out2 13 delay2 8 gnd 12 r20 q4 t1 c12 r15 r16 c9 r12 r13 r6 c8 d4 d1 r8 c1 c11 r11 r23 r9 c14 c2 r14 r22 q1 d5 t2 r4 c6 c7 r7 q3 q2
2 ? 2006 semtech corp. www.semtech.com sc4810b/e power management absolute maximum ratings electrical characteristics r e t e m a r a ps n o i t i d n o c t s e tn i mp y tx a mt i n u n o i t c e s y l p p u s e g a t l o v y l p p u s 5 1v i d d v d d , v 5 1 =n o l oad 5 . 35 . 4a m i d d n w o d t u h ss s=v 00 0 10 5 2a n o i t c e s p m a r e g a t l o v d l o h s e r h t p m a l c p m a r 3v ) n o i s r e v e / b ( n o i t c e s o l v u d l o h s e r h t t r a t s 84 . 88 . 8v s i s e r e t s y h 2v r e t e m a r a pl o b m y sm u m i x a ms t i n u e g a t l o v y l p p u sv d d 9 1v t n e r r u c y l p p u si d d 5 2a m o l v u lv o l v u l 0 1v c n y s , p m a r , s c , b f , t c r , x a m d , s s v o t v 3 . 0 - f e r v 3 . 0 +v f e r v t n e r r u ci f e r 5 1a m o l v u l t n e r r u ci o l v u l 1 -a m e g n a r e r u t a r e p m e t e g a r o t st g t s 0 5 1 + o t 5 6 -c e g n a r e r u t a r e p m e t n o i t c n u jt j 0 5 1 + o t 0 4 -c . c e s 0 1 ) g n i r e d l o s ( e r u t a r e p m e t d a e lt d a e l 0 0 3c . c e s 0 4 - 0 2 e r u t a r e p m e t w o l f e r r i k a e pt g k p 0 6 2c unless specified: v dd = 12v, c ss = 1nf, f osc = 420khz, r t = 10k, c t = 220pf, d max = 2v, r delay = 75k ? , t a = t j = -40oc to 105oc exceeding the specifications below may result in permanent damage to the device, or device malfunction. operation outside of th e parameters specified in the electrical characteristics section is not implied. exposure to absolute maximum rated conditions for extended periods of time may affect device reliability.
3 ? 2006 semtech corp. www.semtech.com sc4810b/e power management electrical characteristics (cont.) r e t e m a r a ps n o i t i d n o c t s e tn i mp y tx a mt i n u n o i t c e s f e r v ) n o i s r e v e / b ( f e r va m 5 - 05 8 . 455 1 . 5v t u o k c o l e g a t l o v r e d n u e n i l d l o h s e r h t t r a t s 1 9 . 239 0 . 3v s i s e r e t s y h 0 5 1v m t n e r r u c s a i b t u p n i ) 1 ( v 2 . 3 = o l v u l0 0 1 -a n n o i t c e s r o t a r a p m o c t n e r r u c t u p n i s c ) 1 ( 0 0 2 -a n y a l e d n o i t a g a p o r p t u o o t m w p ) d a o l o n ( ) 1 ( 5 7s n n o i t c e s t i m i l t n e r r u c d l o h s e r h t t i m i l t n e r r u c 0 9 55 2 60 6 6v m i m i l y a l e d n o i t a g a p o r p t u o o t ) 1 ( 5 7s n n o i t c e s t r a t s t f o s i s s v s s v 0 =5 . 2 -5 -5 . 7 -a d l o h s e r h t n w o d t u h s 0 0 5v m n o i t c e s r o t a l l i c s o e g n a r y c n e u q e r f ) 2 ( 0 50 0 1 1z h k e g a t l o v k a e p t c r 0 0 . 3v e g a t l o v y e l l a v t c r 5 0 . 0v e l c y c y t u d m u m i x a m1 t u o , v 8 . 2 = x a m d5 8% e l c y c y t u d m u m i x a m1 t u o , v 5 2 . 1 = x a m d9 2% y c n e u q e r f 0 8 30 2 40 6 4z h k k c o l c / c n y s d l o h s e r h t c n y s k c o l cd e r e g g i r t e g d e e v i t i s o p2v h t d i w e s l u p t u p n i c n y s m u m i n i m ) 1 ( f c n y s c s o f >0 5s n unless specified: v dd = 12v, c ss = 1nf, f osc = 420khz, r t = 10k, c t = 220pf, d max = 2v, r delay = 75k ? , t a = t j = -40oc to 105oc
4 ? 2006 semtech corp. www.semtech.com sc4810b/e power management electrical characteristics (cont.) r e t e m a r a ps n o i t i d n o c t s e tn i mp y tx a mt i n u ) 2 t u o d n a 1 t u o ( n o i t c e s t u p t u o w o l t a s v t u p t u oi t u o g n i k n i s a m 5 =0 0 5v m h g i h t a s v t u p t u oi t u o g n i c r u o s a m 5 =v f e r 6 . 0 -v e m i t e s i r ) 1 ( c t u o f p 0 2 =0 1s n e m i t l l a f ) 1 ( c t u o f p 0 2 =0 1s n n o i t c e s y a l e d m a r g o r p ) b 0 1 8 4 c s ( e s i r 2 t u o o t l l a f 1 t u o 0 2 1s n ) b 0 1 8 4 c s ( e s i r 1 t u o o t l l a f 2 t u o 0 4 1s n ) e 0 1 8 4 c s ( l l a f 2 t u o o t l l a f 1 t u o 0 2 1s n ) e 0 1 8 4 c s ( e s i r 1 t u o o t e s i r 2 t u o 0 4 1s n notes: (1) guaranteed by design. (2) guaranteed by characterization. (3) this device is esd sensitive. use of standard esd handling precautions is required. unless specified: v dd = 12v, c ss = 1nf, f osc = 420khz, r t = 10k, c t = 220pf, d max = 2v, r delay = 75k ? , t a = t j = -40oc to 105oc
5 ? 2006 semtech corp. www.semtech.com sc4810b/e power management pin configurations ordering information notes: (1) only available in tape and reel packaging. a reel contains 2500 devices for tssop and 3000 parts for mlp package. (2) lead free product. this product is fully weee and rohs compliant. r e b m u n t r a p ) 2 ( e g a k c a p ) 1 ( t ( e g n a r . p m e t j ) t r t s t i b 0 1 8 4 c s 6 1 - p o s s t c 5 0 1 o t c 0 4 - t r t s t i e 0 1 8 4 c s t r t l m i b 0 1 8 4 c s 6 1 - q p l m t r t l m i e 0 1 8 4 c s 1 2 3 4 5 6 7 8 vref vdd top view (16 pin tssop ) 13 12 14 15 16 11 10 9 out1 luvlo pgnd sync out2 rct gnd dmax cs ramp fb delay 1 ss delay 2 top view (16 pin mlpq)
6 ? 2006 semtech corp. www.semtech.com sc4810b/e power management pin descriptions # n i p p o s s t # n i p q p l m e m a n n i pn o i t c n u f n i p 15 1d d v h c i h w v 5 . 7 1 t a d e t a l u g e r t n u h s s i n i p s i h t . e c i v e d s i h t r o f n o i t c e n n o c t u p n i r e w o p e h t d l u o h s d d v . e g a t s r e v i r d t u p t u o s o m d e h t f o g n i t a r e g a t l o v e h t w o l e b y l t n e i c i f f u s s i . r o t i c a p a c c i m a r e c f 1 a h t i w d e s s a p y b e b 26 1o l v u l e h t m a r g o r p l l i w r e d i v i d e v i t s i s e r l a n r e t x e n a . n i p t u o k c o l e g a t l o v r e d n u e n i l e h t d n a d e l b a s i d s i 1 t u o r e v i r d e h t , o l v u l e h t g n i r u d . l e v e l t u o k c o l e g a t l o v r e d n u 2 y a l e d + 1 y a l e d f o e m i t n o d e x i f a h t i w s e u n i t n o c 2 t u o . t e s e r s i t r a t s t f o s . y l e t a m i x o r p p a 31 c n y s e s a h p - i b e h t n i . v 1 . 2 o t t e s d l o h s e r h t a h t i w t u p n i d e r e g g i r t e g d e e v i t i s o p a s i c n y s f o ) r o t i c a p a c g n i m i t ( t c e h t o t d e t c e n n o c e b d l u o h s n i p c n y s e h t e d o m n o i t a r e p o r e l l o r t n o c e l g n i s a n i . n o i t a r e p o e s a h p f o t u o a e c r o f l l i w s i h t . r e l l o r t n o c d n o c e s e h t k c o l c n o i t a z i n o r h c n y s l a n r e t x e n a o t d e t c e n n o c r o d e d n u o r g e b d l u o c c n y s , n o i t a r e p o c s o l a n r e t x e e h t . y c n e u q e r f r o t a l l i c s o d r a o b - n o e h t n a h t r e h g i h y c n e u q e r f a h t i w . n o i t a r e p o c n y s d e e t n a r a u g r o f r e t a e r g % 0 3 e b d l u o h s y c n e u q e r f 42 t c r t c r o t f e r v m o r f t r r o t s i s e r g n i t c e n n o c y b d e r u g i f n o c s i y c n e u q e r f r o t a l l i c s o e h t d n a t r r o f s e u l a v w o l e b n o i t a u q e e h t g n i s u . d n u o r g o t t c r m o r f t c r o t i c a p a c d n a . y c n e u q e r f t u o d e r i s e d e h t e d i v o r p o t d e t c e l e s e b n a c t c e g a t l o v k a e p t c r = k - p v e r e h w 53 x a m d m o r f r e d i v i d r o t s i s e r e h t ( 2 1 r d n a 8 1 r a i v d e m m a r g o r p e b n a c % 5 9 o t p u e l c y c y t u d e l c y c y t u d % 0 0 1 , v 3 e v o b a n e k a t s i n i p x a m d n e h w . ) t i u c r i c n o i t a c i l p p a e h t n i f e r v . d e v e i h c a s i 64 p m a r o t p m a r e h t m o r f r o t i c a p a c a d n a e g a t l o v t u p n i e h t o t p m a r e h t m o r f r o t s i s e r a s i p m a r e h t . t c u d o r p d n o c e s - t l o v e l b a w o l l a m u m i x a m f o l a n g i s p m a r e h t s m r o f d n g a . h g i h s i 1 t u o n e h w e g r a h c o t d e w o l l a d n a w o l s i 1 t u o n e h w d n g o t d e g r a h c s i d m u m i x a m e h t t i m i l o t v 3 o t l a n g i s p m a r e h t s e r a p m o c r o t a r a p m o c d n o c e s - t l o v t c u d o r p d n o c e s - t l o v : t c u d o r p d n o c e s - t l o v e l b a w o l l a 75 1 y a l e d n e e w t e b e m i t y a l e d p a l r e v o - n o n e h t s m a r g o r p d n g o t s n i p e s e h t m o r f r o t s i s e r a . 2 t u o d n a 1 t u o 86 2 y a l e d n e e w t e b e m i t y a l e d p a l r e v o - n o n e h t s m a r g o r p d n g o t s n i p e s e h t m o r f r o t s i s e r a . 1 t u o d n a 2 t u o ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? + ? = ? ref k p v v 1 ln ct ) k 1 rt ( 1 f . cramp rramp 3 clamp ? ? =
7 ? 2006 semtech corp. www.semtech.com sc4810b/e power management # n i p p o s s t # n i p q p l m e m a n n i pn o i t c n u f n i p 97 s s s i d n a s s o t s t c e n n o c r o t i c a p a c g n i m i t t r a t s t f o s e h t . s n o i t c n u f o w t s e v r e s n i p s i h t d e g r a h c s i d s i s s t r a t s t f o s l a m r o n r e d n u . e c r u o s t n e r r u c a 5 l a n r e t n i n a y b d e g r a h c d l e h s i 1 t u o e h t e m i t h c i h w g n i r u d v 1 o t e v i t i s o p s p m a r n e h t d n a v 5 6 . 0 n a h t s s e l o t g n i s a e r c n i n a y b d e t n e m e l p m i s i t r a t s t f o s , v 5 . 2 o t v 1 m o r f s e g r a h c s s s a . w o l . w o l d l e h d n a d e t i b i h n i s i r e v i r d t u p t u o e h t , v 5 . 0 w o l e b n e k a t s i s s f i . e l c y c y t u d t u p t u o s e o g o s l a e c n e r e f e r e g a t l o v ) e d n a c , b ( v 5 r o ) d d n a a ( v 4 e l b i s s e c c a r e s u e h t . a 0 0 1 = d d i d n a w o l 0 18 s c e s n e s a m o r f t u p n i e s n e s t n e r r u c e h t . n i p s c e h t a i v d e d i v o r p s i t u p n i e s n e s t n e r r u c o t l a n g i s t i m i l t n e r r u c d n a r o t a r a p m o c m w p e h t o t k c a b d e e f t n e r r u c s e d i v o r p r o t s i s e r s d e e c x e n i p s i h t t a d e d i v o r p e g a t l o v k a e p e s l u p a n e h w . e s l u p m w p e h t e t a n i m r e t e h t m o r f d e v i r e d s i n o i t a s n e p m o c e p o l s . w o l l o f l l i w e c n e u q e s t r a t s e r - t f o s a , v m 0 0 6 l a n g i s l l a m s l a n r e t x e n a h t i w d e r e f f u b e b n a c d n a r o t i c a p a c g n i m i t e h t t a e g a t l o v g n i s i r . r o t s i s n a r t p n p 1 19 b f m w p e h t r o f s c o t d e r a p m o c n e h w l a n g i s t e s e r a e t a r e n e g o t d e s u s i n i p s i h t f o e g a t l o v t e s f f o n a h t i w r o t a r a p m o c k c a b d e e f e h t . n o i t a u n e t t a 2 / 1 d n a v m 0 0 6 d e t c e n n o c e b l l i w r e l p u o c - o t p o n a r o r e i f i l p m a r o r r e n a f o t u p t u o e h t m o r f l a n g i s g o l a n a . n o i t a l u g e r e d i v o r p o t n i p s i h t o t 2 10 1d n g. s n o i t c n u f l l a r o f d n u o r g l a n g i s 3 11 12 t u o o t r a l i m i s ( t i u c r i c r e v i r d t e f s o m l a n r e t x e e h t o t t u p t u o e v i r d l e v e l c i g o l e h t s i n i p s i h t . h c t i w s y r a t n e m e l p m o c e h t r o f ) 2 0 3 1 c s 4 12 1d n g p . t n i o p e l g n i s a t a d n g d n a d n g p t c e n n o c . s r e v i r d e t a g e h t r o f n o i t c e n n o c d n u o r g 5 13 11 t u o o t r a l i m i s ( t i u c r i c r e v i r d t e f s o m l a n r e t x e e h t o t t u p t u o e v i r d l e v e l c i g o l e h t s i n i p s i h t . h c t i w s n i a m e h t r o f ) 2 0 3 1 c s 6 14 1f e r v . n i p f e r v e h t n o e l b a l i a v a s i d n a d e r e f f u b s i e c n e r e f e r s i h t . t u p t u o e c n e r e f e r v 5 e h t . r o t i c a p a c c i m a r e c f 0 . 1 - 7 4 . 0 a h t i w d e s s a p y b e b d l u o h s f e r v a / nl a m r e h t d a p t o n . s a i v e l p i t l u m g n i s u e n a l p d n u o r g o t t c e n n o c . y l n o s e s o p r u p g n i k n i s t a e h r o f d a p . y l l a n r e t n i d e t c e n n o c pin descriptions (cont.)
8 ? 2006 semtech corp. www.semtech.com sc4810b/e power management block diagram
9 ? 2006 semtech corp. www.semtech.com sc4810b/e power management application information introduction the sc4810b/e is a 16 pin bicmos peak current mode controlled pwm controller for isolated dc-dc and off- line switching power supplies. it features a high switching frequency of operation, programmable limits for both power transformer voltage-second product and maximum pwm duty cycle, line under-voltage lockout, auxiliary switch activation complementary to main power switch drive, programmable leading-edge delay time between activation of each switch, multiple protection features with programmable cycle -by-cycle current limit and hiccup mode over-current protection plus soft-restart. it operates in a fixed frequency programmed by external components. the separate sync pin simplifies synchronization to an external clock. feeding the oscillator of one device to the sync of another forces biphase operation which reduces input ripple and input and output filter size. the sc4810 can be applied in an active clamp forward topology with the input voltage ranging from 36v to 72v. this topology allows the converter to achieve an efficiency of 92.4% at normal input voltage of 48v. circuit description the schematic of the active clamp forward converter is illustrated in figure. 1 below. t4 is the power transformer. m17 is the n-channel main switching mosfet and m15 is the auxiliary n-channel mosfet. c35 is the reset capacitor for resetting the power transformer?s core. m14 and m16 construct the synchronous rectification circuit. l2 and c32 and c33 construct the low-pass output filtering circuit. t6 is the current sensing transformer. r62 is the reset resistor for resetting the magnetic core of the current sensing transformer. d18 is the rectifying diode. r63 is the current sensing resistor. r60 and c41 construct the low-pass filtering circuit for the sensed current signal. the primary bias circuit consists of r55, r58, d17, q8, c40, c31, d14 and r51. r55 and r58 construct a voltage divider, which limits the bias voltage to 6.9v until the line voltage reach 36v. d17 is a zener diode that limits the bias voltage to under 8v. r51, d14 and c31 construct the peak charge circuit. the peak charge circuit will provide bias to the pwm ic u9 (sc4810) and the driver u8 (sc1302a) after the converter starts figure 1: active clamp forward converter r52 10 k r50 5.11 100uf c32 c35 3300pf r78 5.6k c40 10uf 3.3v/30a r70 open c31 0.1uf c46 open c43 100pf r74 4.3k r77 18 k d16 open r53 10 k m1 6 si4842dy 4 5 3 2 1 6 7 8 r80 1.47k r72 5.11k l2 1.3uh r67 50 r64 165k c47 0.01uf r76 3.01k t4 2 4 7 1 6 8 9 10 11 q9 fmmt718 r62 10k c49 180pf r59 10 c44 220pf c45 open d17 open t6 p8208t 8 7 1 3 r58 8k q8 fzt458 r73 3.01k r66 open r57 5.11k d20 1n5819hw r79 100k d14 1n4148ws c50 1000pf d13 1n4148ws c51 0.01uf r61 1.1m d18 1n4148ws m1 4 si4842dy 4 5 3 2 1 6 7 8 r54 20k u9 sc4810 2 4 11 3 10 14 15 1 5 9 7 6 16 13 8 12 luvlo rct fb sync cs pgn d out1 vd d dmax ss delay1 ramp vref out2 delay2 gnd c42 open 48v m15 si4488dy 4 5 3 2 1 6 7 8 c39 0.1uf c48 0.1uf r55 30k r51 5.11 c33 680uf q7 fzt458 c41 330pf r56 10k r75 100k u10 sc431 r69 10 k u8 sc1302a 2 7 6 3 1 8 4 5 r68 1k u11 moc207 1 7 2 6 5 r65 100k t5 pe68386 1 3 4 6 m17 si4488dy 4 5 3 2 1 6 7 8 c36 0.1uf r63 6.8 1u , 1 00 v c34 c37 0.1uf r81 4.7k r71 10k d19 1n5819hw r82 5.11k c38 0.1uf r60 1k d15 1n4148ws
10 ? 2006 semtech corp. www.semtech.com sc4810b/e power management application information (cont.) up so that the total power loss is less. d19, r59, c37, t5, c36, d15 and r53 construct the driving circuit for the auxiliary reset switch m15. the secondary side bias circuit composed of r50, d13 and c38 is regulated to about 7.5v via a linear regulator composed of r57, q7 d16 and c39. the feedback of the converter is composed of u10 (sc431), u11, r73, c47, c45, r72, r76, r70 and c46. sc4810 is the pwm controller which processes the voltage feedback plus current signal and generates driving signals to drive the main switch and auxiliary reset switch. sc1302a is a dual driver ic which is capable of sourcing 3a peak current. to obtain the best performance, sc1302a is adopted to drive m17 and m15 in the semtech application circuits. sc4810 features dual complementary driving signals. and sc4810 also provides adjustable leading-edge delay time for the driving signals, which helps to achieve zero-voltage switching in active clamp forward converter. r75 and r79 are the two resistors available to adjust the delay for the complementary driving. c50 is the soft-start capacitor. r61 and r65 construct the voltage divider for the line under voltage lock out protection. r64 and c44 construct the circuit for the programmable power transformer voltage-second production protection limits. this special protection function provide the voltage-second balance for the power transformer under different input line conditions. r78 and r74 also provide an extra maximum duty cycle protection for the power converter. the clock signal is generated by c49 and r77. when vdd of sc4810 hits the threshold voltage, vref jumps up to 5.0v. vref charges c49 via r77. c49 will be discharged via an internal fet whenever the voltage on c49 reaches 3.0v. the selection of c49 and r77 is described in the ?set clock frequency? section on the following page. q9 works as a buffer between the clock signal and the slope compensation signal to minimize the interference on the system clock signal. r80 is a pull-up resistor tied to vref. since sync function is not utilized, sync pin is grounded via r71. power transformer design a power transformer with the turns ratio of 6 to 1 was designed for this application. with the turns ratio of 6:1, the duty ratio under different input line and load conditions were calculated to verify feasibility. a self-driven configuration was adopted on the secondary side for driving the synchronous rectification fets. one extra winding (pin8~pin9) was added at the bottom side of the power transformer?s secondary side to drive the freewheeling fet. the forward fet was driven directly from the top of the power winding. primary side auxiliary winding was used to generate primary side bias to improve the converter?s efficiency. the final configuration of the power transformer is illustrated as fig. 2. 6t(pri) 2t(pri aux) 1t(sec) 1t(sec aux) 1t(sec) 2 6 1 4 11 10 9 8 7 fig.2 illustration of the power transformer pa0944g (pusle engineering) power mosfet selection the selection of the switching power mosfet is based on the peak & rms current rating, the total gate charge, rds and drain to source voltage rating. in this application, si4842 was chosen for the secondary side synchronous rectification mosfet. and si4488 was chosen for the primary side main switching and reset mosfet. output filter design the output filtering circuit consists of the output inductor and output capacitors. the design of the output capacitor usually depends on the specification of the requirement of the output ripple. given the worst case output ripple requirement and peak to peak output current ripple plus the duty ratio under the different line and load condition, output capacitance is calculated to meet the output ripple requirement. after all, esr and esl of the output capacitor under certain switching frequency should also be considered during the calculation. the value of the output inductance would affect the peak to peak value of the output current, which would also influence the
11 ? 2006 semtech corp. www.semtech.com sc4810b/e power management output voltage ripple. the designer needs to take the output inductance and output capacitance and the esl and esr of the output capacitor into consideration during the design. for this application, one panasonic power choke output inductor was selected and three 6.3v, 100uf tdk ceramic capacitors were adopted in the design. selection of the current sensing resistor the selection of the current sensing resistor is based on the over-current protection triggering point. sc4810 employs a hiccup mode over-current protection with an overcurrent threshold of 600mv. a voltage signal above 600mv on the cs pin will trigger hiccup mode overcurrent protection. suppose the over-current protection setpoint is set to be iov. the threshold voltage of sc4810 is vthreshold. the turns ratio of the power transformer is ns/np. the turns ratio of the current sensing transformer is ncs:1. then the rsense would be calculated as: ) 1 ......( n i n n v r s ov cs p threshold sense = set clock frequency the sc4810 uses a pair of resistors and capacitors to generate a triangle signal as the clock signal, as illustrated in fig. 3. r c rct vref v rct fig. 3 configuration for clock signal the voltage waveform on the rct pin is illustrated as in fig. 4. application information (cont.) v rct t 3v 0v fig.4 voltage waveform on rct pin v pk as illustrated, the capacitor c is charged via the resistor r from vref. whenever the voltage on the rct pin reaches 3v, the capacitor c will be discharged through an internal fet shorted to ground. when the clock signal circuit is connected as in fig.3, the frequency of the clock signal is defined, as in equation 2. ) 2 ........( v v 1 ln ct ) k 1 rt ( 1 f ref k p ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? + ? = ? v ref is the reference voltage of the sc4810, 4v for sc4810a/d and 5v for sc4810b/c/e. in this application, to get 600khz, c = 180pf, (r + 1k) = 10k ohms and v p-k = 3v. maximum duty ratio limit sc4810 features maximum duty ratio limitation for ex- tra protection. the maximum duty ratio is determined by the voltage on dmax pin. as illustrated as in fig. 5, v dmax will be compared with v rct and dmax is determined by the comparison of the two signals.
12 ? 2006 semtech corp. www.semtech.com sc4810b/e power management application information (cont.) clock signal of sc4810 dmax fig. 5 illustration for dmax v rct t 3v 0v 0v v dmax t in this application, v dmax was designed to be 2.8v. so the d max = 90%. limit for power transformer voltage second product the sc4810 also features programmable limits for power transformer voltage-second product. as illustrated in fig. 6 and fig. 7 ramp pin is charged up via a resistor r from the input line voltage. the capacitor c will be discharged via an internal fet shorted to ground and the output out1 will be pulled low whenever the voltage on ramp pin hits 3v. by adjusting the values of the resistor r and the value of the capacitor c, the maximum voltage-sec- ond product imposed on the power transformer is pre- set. the maximum voltage-second product limitation helps prevent saturation of the power transformer. voltage waveform on ramp pin maximum out1 of sc4810 fig. 6 illustration of the programmable limits for power transformer voltage-second product v ramp t 3v 0v 0v t out1 r c ramp fig. 7 illustration for maximum voltage- second product on the power transformer v in the selection of the r and c should consider the maxi- mum voltage rating of the main switching fet. in this application, the voltage rating of si4488 is 150v. since vin*d/(1-d) = 150v, d = 0.8 for low line 36v. so to get 80% at low line, r = 165kohms and c = 220pf were selected using volt-second product equation: 3 ? ramp ? cramp.
13 ? 2006 semtech corp. www.semtech.com sc4810b/e power management application information (cont.) vdd and luvlo sc4810 features three different input turn-on voltage thresholds, as specified in the electrical characteristics on page 2. v ref starts to regulate when the supply voltage on the vdd pin is above the turn-on voltage threshold. v ref drops to ground when vdd is lower than the turn-on threshold minus the hysteresis value. the soft start cap remains grounded as long as luvlo is below the thresh- old voltage 3v. the soft start cap will be charged up through an internal 5ua current source when luvlo is above the threshold voltage. soft start the soft-start function is implemented by charging the soft-start cap through an internal 5ua current source. under normal soft-start, the ss pin is discharged below 0.65v and ramps up to 1v, during which time the output driving signals out1 and out2 are held low. during the time when the ss pin is charged from 1v to 2.5v, soft- start is implemented by an increasing output duty ratio. the duty ratio is completely under the control of the feedback after the ss pin is above 2.5v. when the ss pin is pulled down below 0.5v, out1 and out2 will be held low and the vref pin will be grounded via an internal fet. complementary driving with programmable delays the sc4810 features dual driving signals to drive two power switches complementarily. this feature makes the sc4810 suitable for a variety of applications in which dual complimentary driving signals are needed. the sc4810 even provides programmable driving delay as an extra feature for applications such as active-clamp forward topology. the users can program the driving delay by adjusting the resistors tied to pin delay1 and pin delay2 respectively to achieve the optimum delay for each output. the delay of out1 is controlled by the resistor tied to pin delay1 and the delay of out2 is controlled by the resistor tied to pin delay2. for illustration, see fig. 8. over current protection the sc4810 provides hiccup mode over-current protection when the sensed current signals are beyond 0.6v. when the hiccup mode over-current protection is triggered, the soft-start cap will be discharged immediately by an internal grounded fet. when the soft- start pin ss is pulled down below 1v, out1 and out2 will be disabled, and a soft re-start sequence will follow. sc4810 can also be configured to implement cycle-by- cycle over-current limit. as illustrated in fig. 9, cycle-by- cycle over-current limitation can be achieved by adjusting the values of r1 and r2 to limit the voltage of fb pin to less than the threshold voltage (0.6volt) of the hiccup over-current protection, using equations (3) and (4).
14 ? 2006 semtech corp. www.semtech.com sc4810b/e power management application information (cont.) fb gnd r1 vref r2 v out v bias r3 r4 r5 sc431 fig.9 cycle-by-cycle over-current limitation ) 3 ........( v 3 . 1 v 2 v cs fb + ? = ) 4 ........( r r r v v 2 1 2 ref fb + ? = synchronization sc4810 features a special synchronization function which is leading-edge triggered with a threshold set to 2.1v. applications like multi-phase interleaving can be achieved using the sync pin. when the sync pin is con- nected to the rct pin of the master sc4810, the out- puts of the two sc4810?s will be out of phase. the fre- quency of the master sc4810 clock signal should be at least 30% faster than that of the slave sc4810 for the guaranteed synchronization. sync pin should be grounded if synchronization is unused. (the patent for the synchronization scheme is pending). the synchronous function is illustrated as in fig. 10. v rct t 3v 0v clock signal of the master sc4810 0v 2.1v 0v t t out1 of the master sc4810 out1 of the slave sc4810 fig. 10 illustration for synchronization
15 ? 2006 semtech corp. www.semtech.com sc4810b/e power management pcb layout guidelines pcb layout is very critical, and the following should be used to insure proper operation of the sc4810. high switching currents are present in applications and their effect on ground plane must be understood and minimized. 1) the high power parts of the circuit should be placed on a board first. a ground plane should be used. isolated or semi-isolated areas of the ground plane may be delib- erately introduced to constrain ground currents to par- ticular areas, for example the input capacitor and the main switch fet ground. 2) the loop formed by the input capacitor(s) (cin), the main transformer and the main switch fet must be kept as small as possible. this loop contains all the high fast transient switching current. connections should be as wide and as short as possible to minimize loop induc- tance. minimizing this loop area will a) reduce emi, b) lower ground injection currents, resulting in electrically ?cleaner? grounds for the rest of the system and c) mini- mize source ringing, resulting in more reliable gate switch- ing signals. 3) the connection between fets and the main trans- former should be a wide trace or copper region. it should be as short as practical. since this connection has fast voltage transitions, keeping this connection short will minimize emi. 4) the output capacitor(s) (cout) should be located as close to the load as possible. fast transient load cur- rents are supplied by cout only. connections between cout and the load must be short, wide copper areas to minimize inductance and resistance. 5) a 0.1uf to 1uf ceramic capacitor should be directly connected between vdd and pgnd and a 1uf to 4.7uf ceramic capacitor between vref and pgnd. the sc4810 is best placed over a quiet ground plane area. avoid pulse currents in the cin and the main switch fet loop flowing in this area. gnd should be returned to the ground plane close to the package and close to the ground side of (one of) the vdd supply capacitor(s). under no circumstances should gnd be returned to a ground inside the cin and the main switch fet loop. this can be achieved by making a star connection between the quiet gnd planes that the sc4810 will be connected to and the noisy high current gnd planes connected to the fets. 6) the feed back connection between the error ampli- fier and the fb pin should be kept as short as possible, and the gnd connections should be to the quiet gnd used for the sc4810. 7) if an opto-coupler is used for isolation, quiet primary and secondary ground planes should be used. the same precautions should be followed for the primary gnd plane as mentioned in item 5. for the secondary gnd plane, the gnd plane method mentioned in item 4 should be followed. 8) all the noise sensitive components such as vdd by- pass capacitor, rct oscillator resistor/capacitor network, dmax resistive divider, vref by pass capacitor, delay setting resistors, current sensing circuitry and feedback circuitry should be connected as close as possible to the sc4810. the gnd return should be connected to the quiet sc4810 gnd plane. 9) the connection from the out of the sc4810 should be minimized to avoid any stray inductance. if the layout can not be optimized due to constraints, a small schottky diode may be connected from the out pin to the ground directly at the ic. this will clamp excessive negative volt- ages at the ic. 10) if the sync function is not used, the sync pin should be grounded at the sc4810 gnd to avoid noise pick up. applications information (cont.)
16 ? 2006 semtech corp. www.semtech.com sc4810b/e power management r12 5.1k m7 si2308 m9 si2308 u1 mocd207 1 2 8 7 3 4 6 5 c50 0.1uf d2 1n4148ws d20 mmsz4697(10v) r61 200k d21 1n4148ws r54 5.1 c4 0.1uf c3 0.1uf c2 0.1uf c5 0.1uf r50 open c51 open r52 51 r15 open r25 5.1k r29 6.34k c1 2.2nf /630v r1 5.11 10vbias r62 4.75k r63 10k r60 open vin=48v r44 1.5k r17 1k 100uf c8 100uf c9 m13 si4488dy 4 5 3 2 1 6 7 8 c52 0.1uf u6 sc431 c53 1uf r13 open vout=3.3v/20a q3 fzt853 q1 fmmt618 c16 47uf/16v r18 1k d11 1n5819hw r33 100k t2 pe68386 1 3 4 6 m1 open 4 5 3 2 1 6 7 8 r35 10k d7 1n4148ws r31 7.5k d6 1n4148ws 1u,100v c11 m12 open 4 5 3 2 1 6 7 8 c23 open d1 1n4148ws r34 1k m6 open 4 5 3 2 1 6 7 8 q6 fmmt718 r20 8.2(16//16) tp2 tp3 r38 1.47k r14 open tp4 c22 220pf c15 0.1uf c19 1uf c18 0.1uf l1 1.3uh 1u,100v c12 tp5 m2 open 4 5 3 2 1 6 7 8 tp7 r36 7.5k c21 100pf tp8 tp9 r8 10k tp10 tp11 tp12 tp13 100uf c7 c27 0(short) 1u,100v c10 tp14 r42 2.4k r22 10 t3 p8208t 8 7 1 3 r37 100k r24 100k m10si4842dy 4 5 3 2 1 6 7 8 d9 1n5819hw c24 1uf r32 5.1k tp6 r2 5.1k r30 10k d3 mmsz4702(15v) d4 mmsz4698(11v) c13 22nf/100v q5 fmmt718 c26 47nf d8 mmsz4698(11v) u3 sc4810 luvlo 2 rct 4 fb 11 sy n c 3 cs 10 pgn d 14 out1 15 vdd 1 dmax 5 ss 9 delay1 7 ramp 6 vref 16 out2 13 delay2 8 gnd 12 10vbias u2 sc1302a 2 7 6 3 1 8 4 5 r16 1k r21 1.1m c14 open m4 si4842dy 4 5 3 2 1 6 7 8 r28 10k r43 10k r19 10k r3 5.11k c25 220pf c6 680uf m11 open 4 5 3 2 1 6 7 8 q2 fmmt718 r10 10k r23 160k r57 5.1 t1 pa0944g 2 4 7 1 6 8 9 10 11 d5 1n4148ws m14 si2308 m5 si4488dy 4 5 3 2 1 6 7 8 m8 si4842dy 4 5 3 2 1 6 7 8 r56 5.1 c17 180pf r40 15.8k c20 1uf m3 si4842dy 4 5 3 2 1 6 7 8 r9 10k u4 sc431 d10 1n4148ws q10 fmmt493 sc4810b evaluation board - schematic
17 ? 2006 semtech corp. www.semtech.com sc4810b/e power management item quantity reference part package manufacturer p/n 1 1 c1 2.2nf/630v sm0805 tdk c3216x7r2j222k 211 c2,c3,c4,c5, c15,c18,c19, c20,c50,c52,c53 0.1uf sm0805 3 1 c6 680uf sm/ct_7343_12 sanyo 4tpb680m 4 3 c7,c8,c9 100uf sm/c_1812 tdk c4532x5roj107mt 5 3 c10,c11,c12 1u,100v sm/c_1210 tdk c3225x7r2a105k 6 1 c13 22nf/100v sm1206 tdk c3216x7r2j223m 8 1 c16 47uf/16v sm/ct_7343 sanyo 16tqc47m 9 1 c17 180pf sm0805 10 1 c21 100pf sm0805 11 2 c25,c22 220pf sm0805 12 1 c24 1uf sm0805 13 1 c26 47nf sm0805 14 1 c27 0(short) sm0805 15 7 d1,d2,d5, d6,d7,d10,d21 1n4148ws sod123 vishay 1n4148ws 16 1 d3 mmsz4702(15v) sod123 on semi mmsz4702t1 17 2 d4,d8 mmsz4698(11v) sod123 on semi mmsz4698t1 18 2 d9,d11 sl04 sod123 vishay sl04 19 1 d20 mmsz4697(10v) sod123 on semi mmsz4697t1 20 1 l1 1.3uh pcc-s1 panasonic etqpaf1r3efa 22 4 m3,m4,m8,m10 si4842dy so-8 vishay si4842dy 23 2 m5,m13 si4488dy so-8 vishay si4488dy 24 3 m7,m9,m14 si2308 sot-23 vishay si2308 25 1 q1 fmmt618 sot-23 zetex fmmt618 26 3 q2,q5,q6 fmmt718 sot-23 zetex fmmt718 27 1 q3 fzt853 sm/sot223_bcec zetex fzt853 28 1 q10 fmmt493 sot-23 zetex fmmt493 29 1 r1 5.11 sm0805 30 4 r2,r12,r25,r32 5.1k sm0805 31 1 r3 5.11k sm0805 32 9 r8,r9,r10,r19, r28,r30,r35,r43,r63 10k sm0805 33 1 r13 open sm1206 34 1 r16 1k rc0805 35 3 r17,r18,r34 1k sm0805 sc4810b evaluation board - bom
18 ? 2006 semtech corp. www.semtech.com sc4810b/e power management 36 1 r20 8.2 sm0805 37 1 r21 1.1m sm0805 38 1 r22 10 sm0805 39 1 r23 160k sm0805 40 1 r24 100k sm0805 41 1 r29 6.34k sm0805 42 2 r31,r36 7.5k sm0805 43 2 r33,r37 100k sm0805 44 1 r38 1.47k sm0805 45 1 r40 15.8k sm0805 46 1 r42 2.4k sm0805 47 1 r44 1.5k sm0805 48 1 r52 51 sm0805 49 3 r54,r56,r57 5.1 sm0805 50 1 r61 200k sm0805 51 1 r62 4.75k sm0805 53 1 t1 pa0944g pa0646 pulse pa0944g 54 1 t2 pe68386 pe68386 pulse pe68386 55 1 t3 p8208t p8208 pulse p8208t 56 1 u1 mocd207 so-8 fairchild mocd207 57 1 u2 sc1302a msop-8 semtech sc1302a 58 1 u3 sc4810 tssop16 semtech sc4810 59 2 u4,u6 sc431 sot-23 semtech sc431 sc4810b evaluation board - bom (cont.)
19 ? 2006 semtech corp. www.semtech.com sc4810b/e power management r12 5.1k m7 si2308 m9 si2308 u1 mocd207 1 2 8 7 3 4 6 5 c50 0.1uf d2 1n4148ws d20 mmsz4697(10v) r61 200k d21 1n4148ws r54 5.1 c4 0.1uf c3 0.1uf c2 0.1uf c5 0.1uf d6 1n5819hw r22 2 r50 open c51 open r52 51 r15 open r25 5.1k r29 6.34k c1 2.2nf/630v r1 5.11 r62 4.75k 10vbias r63 10k r60 open vin=48v r44 1.5k r17 1k 100uf c8 100uf c9 m13 si4488dy 4 5 3 2 1 6 7 8 c52 0.1uf u6 sc431 r13 open c53 1uf vout=3.3v/20a q3 fzt853 q1 f mmt618 c16 47uf/16v r18 1k d11 1n5819hw r33 80.6k m1 open 4 5 3 2 1 6 7 8 r35 10k r31 7.5k 1u,100v c11 m12 open 4 5 3 2 1 6 7 8 c23 open d1 1n4148ws r34 1k m6 open 4 5 3 2 1 6 7 8 q6 f mmt718 tp2 r20 8.2(16//16) r38 1.47k tp3 tp4 r14 open c22 220pf c19 1uf c18 0.1uf l1 1.3uh 1u,100v c12 tp5 m2 open 4 5 3 2 1 6 7 8 tp7 r36 7.5k c21 100pf tp8 r8 10k tp9 tp10 tp11 tp12 tp13 c27 0(short) 100uf c7 1u,100v c10 tp14 r42 2.4k t3 p8208t 8 7 1 3 r37 80.6k r24 100k m10 si4842dy 4 5 3 2 1 6 7 8 d9 1n5819hw c24 1uf tp6 r32 5.1k r2 5.1k d3 mmsz4702(15v) r30 10k d4 mmsz4698(11v) c13 22nf/100v q5 f mmt718 c26 47nf d8 mmsz4698(11v) u3 sc4810 luvlo 2 rct 4 fb 11 sync 3 cs 10 pgnd 14 out1 15 vdd 1 dmax 5 ss 9 delay1 7 ramp 6 vref 16 out2 13 delay2 8 gnd 12 10vbias u2 sc1302a 2 7 6 3 1 8 4 5 r16 1k r21 1.1m c14 open m4 si4842dy 4 5 3 2 1 6 7 8 r28 10k r43 10k r19 10k r3 5.11k c25 220pf c6 680uf r10 10k r23 160k r57 5.1 t1 pa0944g 2 4 7 1 6 8 9 10 11 d5 1n4148ws m14 si 2308 m8 si4842dy 4 5 3 2 1 6 7 8 r56 5.1 c17 180pf r40 15.8k c20 1uf m3 si4842dy 4 5 3 2 1 6 7 8 m5 irf6216 4 5 3 2 1 6 7 8 r9 10k u4 sc431 d10 1n4148ws q10 f mmt493 sc4810e evaluation board - schematic
20 ? 2006 semtech corp. www.semtech.com sc4810b/e power management sc4810e evaluation board - bom item quantity reference part package manufacturer p/n 1 1 c1 2.2nf/630v sm0805 tdk c3216x7r2j222k 210 c2,c3,c4,c5,c18, c19,c20,c50,c52,c53 0.1uf sm0805 3 1 c6 680uf sm/ct_7343 sanyo 4tpb680m 4 3 c7,c8,c9 100uf sm/c_1812 tdk c4532x5roj107mt 5 3 c10,c11,c12 1u,100v sm/c_1210 tdk c3225x7r2a105k 6 1 c13 22nf/100v sm1206 tdk c3216x7r2j223m 8 1 c16 47uf/16v sm/ct_7343 sanyo 16tqc47m 9 1 c17 180pf sm0805 10 1 c21 100pf sm0805 11 2 c25,c22 220pf sm0805 12 1 c24 1uf sm0805 13 1 c26 47nf sm0805 14 1 c27 0(short) sm0805 15 5 d1,d2,d5,d10,d21 1n4148ws sod123 vishay 1n4148ws 16 1 d3 mmsz4702(15v) sod123 on semi mmsz4702t1 17 2 d4,d8 mmsz4698(11v) sod123 on semi mmsz4698t1 18 3 d6,d9,d11 sl04 sod123 vishay sl04 19 1 d20 mmsz4697(10v) sod123 on semi mmsz4697t1 20 1 l1 1.3uh pcc-s1 panasonic etqpaf1r3efa 22 4 m3,m4,m8,m10 si4842dy so-8 vishay si4842dy 23 1 m5 irf6216 so-8 i. r. irf6216 24 3 m7,m9,m14 si2308 sot-23 vishay si2308 25 1 m13 si4488dy so-8 vishay si4488dy 26 1 q1 fmmt618 sot-23 zetex fmmt618 27 1 q3 fzt853 sm/sot223 zetex fzt853 28 2 q5,q6 fmmt718 sot-23 zetex fmmt718 29 1 q10 fmmt493 sot-23 zetex fmmt493 30 1 r1 5.11 sm0805 31 4 r2,r12,r25,r32 5.1k sm0805 32 1 r3 5.11k sm0805 33 9 r8,r9,r10,r19, r28,r30,r35,r43,r63 10k sm0805 35 1 r16 1k sm0805
21 ? 2006 semtech corp. www.semtech.com sc4810b/e power management sc4810e evaluation board - bom 36 3 r17,r18,r34 1k sm0805 37 1 r20 8.2 sm0805 38 1 r21 1.1m sm0805 39 1 r22 2 sm0805 40 1 r23 160k sm0805 41 1 r24 100k sm0805 42 1 r29 6.34k sm0805 43 2 r31,r36 7.5k sm0805 44 2 r33,r37 80.6k sm0805 45 1 r38 1.47k sm0805 46 1 r40 15.8k sm0805 47 1 r42 2.4k sm0805 48 1 r44 1.5k sm0805 49 1 r52 51 sm0805 50 3 r54,r56,57 5.1 sm0805 51 1 r61 200k sm0805 52 1 r62 4.75k sm0805 54 1 t1 pa0944g pa0646 pulse pa0944g 55 1 t3 p8208t p8208 pulse p8208t 56 1 u1 mocd207 so-8 fairchild mocd207 57 1 u2 sc1302a msop-8 semtech sc1302a 58 1 u3 sc4810 tssop16 semtech sc4810 59 2 u4,u6 sc431 sot-23 semtech sc431
22 ? 2006 semtech corp. www.semtech.com sc4810b/e power management outline drawing - tssop-16 reference jedec std mo-153, variation ab. e/2 d bxn bbb c a-b d datums and to be determined at datum plane dimensions "e1" and "d" do not include mold flash, protrusions controlling dimensions are in millimeters (angles in degrees). or gate burrs. 2. 4. 3. notes: 1. -b- -a- side view seating 2x n/2 tips aaa c ccc c indicator pin 1 plane 2x c b 1 e/2 n 3 2 a c l (l1) 01 detail see detail a -h- 0.25 a 0.80 0.05 min dimensions millimeters 4.30 0.45 0.09 4.90 0.19 c d e l1 l e e1 01 ccc aaa bbb n b a a2 a1 a2 a1 a e1 e 0 0 8 .004 .004 .008 h gage plane - .026 bsc .252 bsc .173 .196 (.039) .024 16 .169 .018 .003 .192 .007 - .031 .002 - - - - - .177 .030 .047 .042 .006 .007 .201 .012 - dim e d inches nom min max 8 0.10 0.20 0.10 - 1.20 1.05 0.15 4.50 0.75 0.20 5.10 0.30 4.40 0.65 bsc 6.40 bsc (1.0) 0.60 16 5.00 - - - - - max nom this land pattern is for reference purposes only. consult your manufacturing group to ensure your company's manufacturing guidelines are met. notes: 1. (.222) (5.65) z g y p (c) 4.10 .161 0.65 .026 0.40 .016 1.55 .061 7.20 .283 x inches dimensions z p y x dim c g millimeters land pattern - tssop-16
23 ? 2006 semtech corp. www.semtech.com sc4810b/e power management outline drawing - mlpq-16, 4 x 4 .003 .010 .100 16 .012 .106 - .000 .031 (.008) 0.08 0.30 16 .014 .110 0.25 2.55 .040 - .002 - 0.00 0.80 2.80 0.35 2.70 - 0.05 1.00 (0.20) .004 0.10 0.65 bsc .026 bsc 0.30 .012 .020 .016 0.40 0.50 d/2 2 a a1 1 bbb c a b a2 bxn e seating plane c e/2 n e/2 aaa c controlling dimensions are in millimeters (angles in degrees). coplanarity applies to the exposed pad as well as the terminals. 1. 2. notes: a d e b - - - - indicator (laser mark) pin 1 dimensions nom inches n bbb aaa a2 a1 e1 d1 dim l e e d a b min max millimeters min max nom .153 .157 .161 3.90 4.00 4.10 .153 .157 .161 3.90 4.00 4.10 lxn d1 e1 .100 .106 .110 2.55 2.70 2.80
24 ? 2006 semtech corp. www.semtech.com sc4810b/e power management semtech corporation power management products division 200 flynn road, camarillo, ca 93012 phone: (805)498-2111 fax (805)498-3804 contact information land pattern - mlpq-16, 4 x 4 this land pattern is for reference purposes only. consult your manufacturing group to ensure your company's manufacturing guidelines are met. notes: 1. 2x g h 2x (c) 2x z x p y k c z p y x g k h .189 .026 .016 .033 .122 .106 .106 4.80 0.40 0.85 0.65 2.70 2.70 3.10 dim (3.95) millimeters dimensions (.156) inches

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